From 50b0cddf6f108406e9e28ff6d6f7e7d2263599ba Mon Sep 17 00:00:00 2001 From: "Michael D. M. Dryden" Date: Tue, 3 Jul 2018 20:11:42 -0400 Subject: [PATCH] Prevent shorting CE/RE after experiment/during init. --- src/experiment.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/src/experiment.c b/src/experiment.c index 43f7333..11fb023 100644 --- a/src/experiment.c +++ b/src/experiment.c @@ -346,7 +346,7 @@ void pot_init(void){ #if BOARD_VER_MAJOR == 1 && BOARD_VER_MINOR == 2 ioport_set_port_dir(IOPORT_PORTB, PIN2_bm|PIN3_bm|PIN4_bm|PIN5_bm|PIN6_bm|PIN7_bm, IOPORT_DIR_OUTPUT); ioport_set_port_dir(IOPORT_PORTD, PIN4_bm, IOPORT_DIR_OUTPUT); - ioport_set_port_level(IOPORT_PORTB, PIN2_bm|PIN3_bm|PIN4_bm|PIN5_bm|PIN6_bm|PIN7_bm, PIN3_bm|PIN6_bm|PIN7_bm); + ioport_set_port_level(IOPORT_PORTB, PIN2_bm|PIN3_bm|PIN4_bm|PIN5_bm|PIN6_bm|PIN7_bm, PIN6_bm|PIN7_bm); ioport_set_port_level(IOPORT_PORTD, PIN4_bm, PIN4_bm); #endif } @@ -501,8 +501,6 @@ void volt_exp_stop(void){ delay_ms(100); // Make sure WE is last to disconnect ioport_set_pin_level(PIN_POT_WE, 0); - - ioport_set_pin_level(PIN_POT_2ELECTRODE, 1); } #if BOARD_VER_MAJOR == 1 && BOARD_VER_MINOR >= 2 -- GitLab