diff --git a/DSTAT-temp/src/experiment.c b/DSTAT-temp/src/experiment.c index 12648828539378ae0c2a6222bd8d940f9a8c1448..4786026447ac9aad8e39f26a6aa32cd206095cf6 100644 --- a/DSTAT-temp/src/experiment.c +++ b/DSTAT-temp/src/experiment.c @@ -75,6 +75,45 @@ void send_data_int32(int32_t data){ udi_cdc_putc(((unsigned char *)(&data))[3]); } +void set_timer_period(uint32_t period, volatile void *tc) +{ + uint16_t temp_div = ceil((double)period/65536); + + if (temp_div == 1) + tc_write_clock_source(tc, TC_CLKSEL_DIV1_gc); + else if (temp_div == 2){ + tc_write_clock_source(tc, TC_CLKSEL_DIV2_gc); + period /= 2; + } + else if (temp_div <= 4){ + tc_write_clock_source(tc, TC_CLKSEL_DIV4_gc); + period /= 4; + } + else if (temp_div <= 8){ + tc_write_clock_source(tc,TC_CLKSEL_DIV8_gc); + period /= 8; + } + else if (temp_div <= 64){ + tc_write_clock_source(tc,TC_CLKSEL_DIV64_gc); + period /= 64; + } + else if (temp_div <= 256){ + tc_write_clock_source(tc,TC_CLKSEL_DIV256_gc); + period /= 256; + } + else if (temp_div <= 1024){ + tc_write_clock_source(tc,TC_CLKSEL_DIV1024_gc); + period /= 1024; + } + else{ + printf("#Frequency/ADC rate is too low\n\r"); + return; + } + + tc_write_period(tc, (uint16_t)period); + return; +} + void pot_init(void){ /** * Initializes AVR port directions and levels @@ -767,45 +806,12 @@ void swv_experiment(int16_t start, int16_t stop, uint16_t step, uint16_t pulse_h //calculate time to ADC trigger period = ceil((1/(double)frequency)*F_CPU); - uint16_t temp_div = ceil((double)period/65536); - - if (temp_div == 1) - tc_write_clock_source(&TCF0,TC_CLKSEL_DIV1_gc); - else if (temp_div == 2){ - tc_write_clock_source(&TCF0,TC_CLKSEL_DIV2_gc); - period /= 2; - } - else if (temp_div <= 4){ - tc_write_clock_source(&TCF0,TC_CLKSEL_DIV4_gc); - period /= 4; - } - else if (temp_div <= 8){ - tc_write_clock_source(&TCF0,TC_CLKSEL_DIV8_gc); - period /= 8; - } - else if (temp_div <= 64){ - tc_write_clock_source(&TCF0,TC_CLKSEL_DIV64_gc); - period /= 64; - } - else if (temp_div <= 256){ - tc_write_clock_source(&TCF0,TC_CLKSEL_DIV256_gc); - period /= 256; - } - else if (temp_div <= 1024){ - tc_write_clock_source(&TCF0,TC_CLKSEL_DIV1024_gc); - period /= 1024; - } - else{ - printf("#Frequency/ADC rate is too low\n\r"); - return; - } - - tc_write_period(&TCF0, (uint16_t)period); if (direction == 1) max5443_set_voltage1(dacindex+dacindex_pulse_height); else max5443_set_voltage1(dacindex-dacindex_pulse_height); + set_timer_period(period, &TCF0); ads1255_wakeup(); ads1255_rdatac(); diff --git a/DSTAT-temp/src/experiment.h b/DSTAT-temp/src/experiment.h index 4d270407b4b530f8dda9ddbdbed926e7ff89602e..b52a58e66f10b967927eea76851150084f68dcbd 100644 --- a/DSTAT-temp/src/experiment.h +++ b/DSTAT-temp/src/experiment.h @@ -77,6 +77,7 @@ extern uint8_t autogain_enable; void send_data_uint16(uint16_t data); void send_data_int32(int32_t data); +void set_timer_period(uint32_t period, volatile void *tc); void pot_init(void); void pot_set_gain(void); void volt_exp_start(void);